COA Lab
Q1. What component is essential in ensuring that only one memory location is activated at a time during decoding?
A) Multiplexer
B) Decoder
C) Flip-flop
D) Register
Q2. Which outcome indicates a successful memory address decoding operation?
A) Only the intended memory location is selected for the given address.
B) The circuit outputs a high signal for multiple addresses simultaneously.
C) All memory cells respond regardless of the address provided.
D) The address lines remain inactive throughout the process.
Q3. When designing a 2-to-4 line decoder, how many address lines are required?
A) 2
B) 1
C) 3
D) 4
Q4. Which issue can arise if there is a fault in the 2-to-4 decoder circuit?
A) No memory location can be accessed.
B) The circuit becomes faster.
C) The circuit operates without errors.
D) All memory cells receive data simulataneously
Q5. How does a 2-to-4 decoder function when receiving an address input?
A) It activates only the specific memory location that matches the address.
B) It directs power to all connected memory locations.
C) It amplifies the signal strength to reach all memory cells.
D) It reads data from all memory locations simultaneously.
